1// See MultiProcessor Specification Version 1.[14]
2
3struct mp { // floating pointer
4 uchar signature[4]; // "_MP_"
5 void *physaddr; // phys addr of MP config table
6 uchar length; // 1
7 uchar specrev; // [14]
8 uchar checksum; // all bytes must add up to 0
9 uchar type; // MP system config type
10 uchar imcrp;
11 uchar reserved[3];
12};
13
14struct mpconf { // configuration table header
15 uchar signature[4]; // "PCMP"
16 ushort length; // total table length
17 uchar version; // [14]
18 uchar checksum; // all bytes must add up to 0
19 uchar product[20]; // product id
20 uint *oemtable; // OEM table pointer
21 ushort oemlength; // OEM table length
22 ushort entry; // entry count
23 uint *lapicaddr; // address of local APIC
24 ushort xlength; // extended table length
25 uchar xchecksum; // extended table checksum
26 uchar reserved;
27};
28
29struct mpproc { // processor table entry
30 uchar type; // entry type (0)
31 uchar apicid; // local APIC id
32 uchar version; // local APIC verison
33 uchar flags; // CPU flags
34 #define MPBOOT 0x02 // This proc is the bootstrap processor.
35 uchar signature[4]; // CPU signature
36 uint feature; // feature flags from CPUID instruction
37 uchar reserved[8];
38};
39
40struct mpioapic { // I/O APIC table entry
41 uchar type; // entry type (2)
42 uchar apicno; // I/O APIC id
43 uchar version; // I/O APIC version
44 uchar flags; // I/O APIC flags
45 uint *addr; // I/O APIC address
46};
47
48// Table entry types
49#define MPPROC 0x00 // One per processor
50#define MPBUS 0x01 // One per bus
51#define MPIOAPIC 0x02 // One per I/O APIC
52#define MPIOINTR 0x03 // One per bus interrupt source
53#define MPLINTR 0x04 // One per system interrupt source
54
55//PAGEBREAK!
56// Blank page.
57